Next generation branch prediction
technology, deeper buffers for more instruction parallelism, and increased clock speeds combine to help increase performance while maintaining overall TDP.
In recent years, research has explored more advanced branch prediction
techniques such as neural networks  and other forms of machine learning.
A dynamic branch prediction
circuit eliminates idle cycles during execution of change-of-flow instructions, thereby accelerating new and existing StarCore programs by an average of 10%.
But despite the important benefits provided by branch prediction
schemes, there are many mispredicted branches.
Similarly, floating-point, computationally intensive tasks will gain some performance from both faster clock speeds and from the chip's internal branch prediction
mechanisms (as well as from RDRAM, if used).
This is because with perfect branch prediction
only the true execution path is seen.
, whether dynamic (hardware-based) or static (software-based), makes good guesses about likely branch targets and allows the instruction unit to fetch instructions early.
Smith (University of Wisconsin) for fundamental contributions to high-performance microarchitecture, including saturating counters for branch prediction
, reorder buffers for precise exceptions, decoupled access/execute architectures, and vector supercomputer organization, memory, and interconnects.
Data throughput will be boosted by dynamic branch prediction
and extensive data bypassing techniques.
For the most part, researchers investigating high-performance processors are looking at evolutionary variations on already known techniques for increasing instruction-level parallelism, for example, ways to increase superscalar issue by some small factor, more elaborate branch prediction
methods, ways of increasing cache hit rates by more sophisticated buffering methods, more elaborate cache coherence methods, and so on.
11 or Windows 95 because the Pentium has superscalar architecture, separate code and data caches, branch prediction
, a high-performance floating point unit, and an enhanced 64-bit data bus.
The ARC 750D configurable RISC core includes features such as a high performance 7 stage pipeline, dynamic branch prediction
unit and a memory management unit for Embedded Linux and other high-end operating systems.