This is one of the main goals of the Testability
Management Action Group, or TMAG (tmag4dft.
In addition, 1Team:Analyze Test and 1Team:Analyze Power options enable users to tune and automatically correct their RTL designs to meet testability
and power consumption goals.
The SpyGlass([R])-DFT solution has the unique ability to predict ATPG (automatic test pattern generation) test coverage for both stuck-at and transition faults and pinpoint testability
issues as the RTL description is developed, even before a gate-level netlist is generated.
ViewTest comprises a set of sequential test tools that work together to dramatically improve design testability
, shorten the design time of ASIC designers, increase product quality and decrease testing costs.
DSD-Pak[TM] Technology Delivers Superior Testability
and Electrical Performance for Multi-Die Packages
has announced that AMD's Personal Connectivity Solutions Group (PCS) has selected Atrenta's SpyGlass Predictive Analyzer and SpyGlass Design For Testability
(DFT) to predict critical testability
and Register Transfer Language (RTL) handover issues right up front at RTL, before lengthy synthesis and simulation runs, thereby saving months of re-coding, re-synthesis and re-verification cycles.