Under the licensing agreement, the equipment manufacturer is under no obligation to provide users with the ability to disable the secure boot
Microsemi's secure boot
solution ensures confidentiality and authentication of an underlying system design by leveraging the high security of our SmartFusion2 SoC FPGAs as a root-of-trust," said Paul Quintana, director of vertical marketing for defense, security and computing at Microsemi.
Secure Asset Store enables secure storage, usage and management of sensitive keys and assets, and Secure Boot
ensures that only the software images from an authorized source are booted.
Keelback" APM86791 utilizes dedicated secure boot
ROM, EFUSE array, encryption engine, RTC, Public Key Accelerator and True Random Number Generator (TRNG) to enable the TMM features.
These DoD contractors are looking for ways to secure their advanced technology systems against reverse engineering and exploitation so they can be exported safely, and our secure boot
solution is an important security layer in providing that protection.
For applications in which secure boot
and FlexCAN controllers are not required, Freescale also offers the QorIQ P1014 processor, which is a streamlined version of the P1010.
11, 2014 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today unveiled its new FPGA-based Secure Boot
Reference Design for embedded microprocessors.
SSL[TM] extends our security product lineup targeted to a range of embedded price-performance points, including SSH[TM] secure shell and tunneling, Load[TM] secure boot
loader and installer, and the breakthrough pico-server for HTML and M2M XML applications.
The Tablet also embodies additional security features such as AES256 encryption and a secure boot
SafeZone secure platform - combining hardware IP and middleware to realize hardware-based platform security features like secure boot
, hardware protected key storage and utilization, and application separation.
The two companies provide a new approach to building a fully secure boot
process, from silicon to the system level.
Collaboration Extends Microsemi's PUF-based Secure Boot
Solution to High-end Altera & Xilinx FPGAs and SoCs