By combining a lightweight executive requiring minimal context for DSP threads with a protected prioritized, preemptive kernel for event-driven tasks, RTXC/dm ensures that both RISC
and DSP application code execute with maximum efficiency.
The ARC(TM) 700 CPU/DSP is a 7 stage 32-bit scalar RISC
architecture that is ideally suited for high data rate applications.
Katsuhiro Shimohigashi, President and CEO of STARC, added: "STARC took delivery of the SH-4 RISC
CPU core design data from SuperH, Inc.
In addition to providing an abundance of storage capacity, mDiskOnChip G3 augments the low cost, extreme reliability and high performance that our customers have come to expect," said Joe Cheng, director of Advantech's RISC
Embedded Computing Division.
The ARM9E family of products are DSP-enhanced 32-bit RISC
processors, well suited for applications requiring a mix of DSP and microcontroller performance.
The ARCtangent-A5 can be configured and extended to best meet the demanding performance requirements of DSP applications, such as complex portable devices, as well as provide the RISC
processing that many DSP applications now require, all in a small, single processor core.
The ARC 700 soft core is available today in RISC