Branch

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Branch

An operation in a foreign country incorporated in the home country.

Branch

1. An office or subsidiary of a company that exists and conducts operations in a country other than the one in which the company is headquartered. See also: MNC.

2. A semi-independent office of a bank. For example, a bank may have five branches in a city where account holders can make deposits and withdrawals and conduct other business at the place most convenient for them.
References in periodicals archive ?
Since literature shows that the most advanced branch prediction methods adopt neural or saturating elements, the SDFM has the potential to improve on these methods as a replacement for the saturating elements.
Section 6 presents a performance analysis and finally, section 7 gives conclusions and suggested future dynamic branch prediction development.
In this section, we present our shadow dynamic finite state machine (SDFSM) branch prediction technique for learning/predicting an application's unique branching patterns.
Among many more others in this field, a new predictor discussed in [6] is based on Simultaneous Subordinate MicroThreading (SSMT), which provides a new means to improve branch prediction accuracy.
A branch's behavior, either at times or throughout the life of the program, may be simply run-time data-dependent which is either completely "random" or unpredictable based on any of the known branch prediction schemes.
Grunwald, "Fast & Accurate Instruction Fetch and Branch Prediction," Intl.
An alternative approach for thread selection is using confidence estimation for branch predictions [3].
The patents relate to technologies -- cache management, branch prediction and high-speed instruction processing -- which are vital to state-of-the-art microprocessor design.
High-Efficiency Dynamic Branch Prediction -- 3K branch history table with 2-bit counter keeps the pipeline full by minimizing branch mispredicts.
The ARM10TDMI core employs parallel instruction execution, branch prediction, and the ability to continue executing in the presence of a cache miss to achieve high performance on real applications.
The superscalar RISC86 microarchitecture applies RISC performance techniques to the x86 instruction set, as well as incorporating the state-of-the-art computer architecture technique of out-of-order execution, speculative execution, register renaming, data forwarding, and 2-level branch prediction.
The PA-8500 incorporates enhanced branch prediction capabilities, reducing branch mispredicts, a significant processor limitation.